With the rapid development of Electronic Engineering and Computer Science (EECS), the development of digital circuit systems is also very rapid. Electronic devices have evolved in recent decades from small scale integrated circuits (SSIs), medium scale integrated circuits (MSIs) to large scale integrated circuits (LSIs) to very large scale integrated circuits (VLSIs). From simple programmable devices to high-density programmable devices, the design methodology is fundamentally shifting from the original manual design to the current Electronic Design Automation ( EDA ) design. In order to improve the reliability and versatility of the system, microprocessors and application specific integrated circuits (ASICs) have gradually replaced the general hardware LSI circuits. Programmable logic devices (PLDs), especially field programmable logic devices (FPLDs), have been widely used. In the production of ASICs, the emergence of EDA technology brought about a revolutionary change in the design of electronic systems during the development of programmable integrated circuits.
1 Development of EDA technology
EDA technology is accompanied by the development of computer, integrated circuit and electronic system design. It has experienced three development stages: computer aided design (CAD), computer aided engineering design (CAE) and electronic system design automation (ESDA).
In the 1970s, it was the CAD stage. At this stage, people began to use computer-aided IC layout editing and PCB layout to replace manual operations. In the 1980s, it was the CAE stage. In addition to the pure graphic drawing function, it added circuit function design and structural design, and combined the two through electrical connection netlist to realize engineering design. In the ESDA phase in the 1990s, the basic feature of ESDA is that designers design and functionally partition the entire system according to the “top-down†design method. The key parts of the system are implemented with one or several dedicated integrated circuits, and then adopted. The hardware description language (HDL) completes the system behavioral level design and finally generates the final target device through the synthesizer and adapter. The emergence of ESDA enabled designers to realize the dream of “concept-driven engineeringâ€, thus getting rid of a large number of auxiliary design work, focusing on creative solutions and conceptual concepts, greatly improving the efficiency of the system and shortening the product. Development cycle.
2 Basic characteristics of EDA technology
EDA technology is a computer software system developed on the basis of electronic CAD technology. It refers to the computer-based work platform, which combines the latest achievements of applied electronic technology, computer technology, information processing and intelligent technology to carry out automatic design of electronic products. Electronic design automation engineering is a modern electronic design discipline of computer software, hardware and microelectronics crossover that has developed rapidly in recent years. It uses EDA software tools as the development environment, hardware description language as the design language, and programmable devices as the experiment. Carrier, the application of integrated circuit (ASIC), system-on-a-chip (SOC) chip as the device target, electronic product design as the application direction of the electronic product automation design process [1]. With EDA tools, electronic designers can design electronic systems from concepts, algorithms, protocols, etc. A lot of work can be done by computer, and the whole process of electronic products can be from circuit design and performance analysis to designing IC layout or PCB layout. The automatic processing on the computer is completed.
Modern EDA technology is a high-level language description with system-level simulation and synthesis capabilities. It mainly uses Concurrent Engineering design and top-down design method. The basic idea is to start from the overall requirements of the system. It is divided into three levels: behavior description, register transfer level description, and logic synthesis. The design content is gradually refined, and finally the overall design is completed. This is a brand-new design idea and design concept.
3 Trends in EDA technology
In the 21st century, fully customized and custom ASICs are becoming a new development hotspot. The design and application of ASICs must rely on specialized EDA tools. Therefore, EDA technology in functional simulation, timing analysis, integrated circuit automatic testing, high-speed printed circuits The board design and the expansion of the operating platform are facing new and huge challenges. EDA technology
The technology is currently in a high-speed development stage. Every year, new EDA tools are available. The application level of EDA technology in China has lagged behind developed countries for a long time. Therefore, the majority of electronic engineers should master this advanced technology as soon as possible, which is not only to improve design efficiency. Need, it is also the need for China's electronics industry to survive, compete and develop in the world market.
4 EDA technology design process
EDA technology is to change the traditional "circuit design - hardware test - debug welding" mode into "functional design - software simulation - program download" mode, the designer only needs a microcomputer and the corresponding development tools Various functional circuits have been developed. EDA technology automatically processes electronic product design from software compilation, logic simplification, logic synthesis, simulation optimization, place and route, logic adaptation, logic mapping, program download, and target system generation on the computer and its development platform. The specific process is shown in Figure 1:
The following is a hierarchical design method using Alter's programmable device development tool MAX+plusII as a platform to design a control circuit for traffic lights at intersections.
5 Application of EDA technology
Design a traffic control circuit at the intersection, control the traffic between the east and west and the intersection of the north and the south through the red (R), yellow (Y), and green (G) lights. Two transit times T1 and T2 are required, and the traffic lights alternate time. T3.
There are many control methods for realizing intersection traffic light system, which can be implemented by standard logic devices, programmable controllers and single-chip microcomputers. However, the function modification and debugging of these control methods require the support of hardware circuits, which adds functions to a certain extent. Modifications and difficulties in system debugging. Therefore, in the design, the VHDL hardware description language in EDA technology is used, and the MAX+plusII development environment is used for comprehensive simulation, and downloaded into the CPLD programmable logic device to complete the control function of the system.
C1, C2, and C3 are the enable control signals for each timer. W1, W2, and W3 are the status signals of the timers. The output time is 1 and the output time is 0. The timer in the system can be implemented by a subtraction counter with preset function. The controller can use CPLD device EPM7128 series chip, and the second pulse signal CLK can be generated by the crystal oscillator output after frequency division, when the accuracy and stability requirements are not high. It can be generated using an RC ring oscillator, a 555 timer or other circuitry. According to the requirements of the system.
The controller and the three timers (TImer) are VHDL descriptions. The functions of the three timers in the source program are exactly the same, except that the number of presets is different, so only one entity [2] is defined. The source of the controller and timer is as follows:
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY control IS - Controller entity description
PORT(clk,reset,w1,w2,w3:IN STD_LOGIC);
END control;
ARCHITECTURE beh_control OF control IS - control body structure
TYPE state_type IS (S0, S1, S2, S3);
SIGNAL state: state_type;
BEGIN
PROCESS(clk,reset)
BEGIN
IF reset='1'THEN
State<=S0;
ELSIF(clk'EVENT AND clk='1')THEN
CASE state IS
WHEN S0=>IF w1='1'THEN
State<=S1;
END IF;
WHEN S1=>IF w3='1'THEN
END IF;
WHEN S2=>IF w2='1'THEN
State<=S3;
END IF;
WHEN S3=>IF w3='1'THEN
State<=S0;
END IF;
END CASE;
END IF;
END PROCESS;
C1<='1'WHEN state=S0 ELSE'0';
C2<='1' WHEN state=S2 ELSE'0';
C3<='1' WHEN(state=S1 OR state=S3)ELSE'0';
R1<='1' WHEN(state=S2OR state=S3)ELSE'0';
G1<='1' WHEN state=S0 ELSE'0';
Y1<='1' WHEN state=S1 ELSE'0';
R2<='1' WHEN(state=S0 OR state=S1)ELSE'0';
G2<='1' WHEN state=S2 ELSE'0';
Y2<='1' WHEN state=S3 ELSE'0';
END beh_control;
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY TImer IS - Timer Entity Description
PORT(clk,c:IN STD_LOGIC;
d:IN INTEGER RANGE 1TO 31;
w:OUT STD_LOGIC);
END timer;
ARCHITECTURE beh_timer OF timer IS - timer structure
BEGIN
PROCESS(clk)
VARIABLE cnt: INTEGER RANGE 0 TO 31;
BEGIN
IF(clk='1')THEN
IF(c='1'AND cnt>0)THEN
Cnt:=cnt-1;
ELSE
Cnt:=d;
END IF;
END IF;
IF cnt=0 THEN
w<='1';
ELSE
w<='0';
END IF;
END PROCESS;
END beh_timer;
After completing the above two basic modules, a top-level file can be formed, compiled and simulated in the MAX+plusII environment, and the system function is verified to be correct. If an error occurs, it needs to be modified until it is completely passed. When the designer determines that the design work has been largely successful, the data stream can be downloaded via the programming cable for hardware verification. After passing the verification, the overall design work is successfully completed. The system has a variety of writing methods when writing the source program of the controller. The following are two other definition methods of the controller's VHDL program:
(1)
...
ARCHITECTURE con1_arc OF con1 IS
SIGNAL current_state:state;
BEGIN
...
In the timing analysis, there are results that do not work in the set counting order: 14, 13, 2, 1, 0... After repeated modification and debugging, the program is modified, as shown in (2):
(2)
ARCHITECTURE con1_arc OF con1 IS
SIGNAL current_state:state;
SIGNAL TEMP_STATE:state;
...
TEMP STATE<=current_state;
BEGIN
...
In this design method, a signal variable is defined so that the program can be converted according to the set states 14, 13, 12, 11...
It can be seen from the above that the advantage of EDA technology is that the error and system functions can be modified directly from the program without the support of the hardware circuit, that is, the system debugging performed later is transferred to the function simulation and timing performed on the computer before the design is implemented. simulation. It makes the function modification and debugging of the system more convenient, faster and more accurate, which not only shortens the research and development cycle, but also greatly saves the cost.
6 Conclusion
The design input of the electronic system can be input by means of schematic diagram, waveform, VHDL language, etc. The whole process before downloading the configuration hardly involves the whole hardware, and the modification of the hardware design is as fast and convenient as modifying the software program, that is, by software. Design and test to achieve the design and implementation of hardware circuits for specific functions. This modern electronic system design technology adopts a top-down hierarchical and modular design method, which is firstly zeroed out, optimized and integrated, and flexible and universal. The most ideal choice for the development and development of digital systems is a trend in modern electronic circuit design methods, reflecting the new development of hardware design to the direction of software.
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