Design of LED Display Control Circuit Based on CPLD

In recent years, with the rapid development of computer technology and integrated circuit technology, the widely used large-screen display system is a video LED display system. In the LED display technology, the performance of the red and green LEDs, such as brightness and chromatic aberration, has been greatly improved. In addition to the development of computer multimedia production software, the manufacturing cost of the pseudo-color video LED display system is greatly reduced. The field is constantly increasing. This pseudo color video LED display system uses computer multimedia technology to display video images in full sync, with clear images, high brightness and no seams. The video gray level of each color has been raised by the early 16 gray levels. 256 gradations, with the development of large-scale integrated circuits and special components, 256-level grayscale full-color video LED display system is possible at any time.

LED electronic display technology has developed rapidly and has become one of the leading players in the field of flat panel display. This article focuses on the design of the LED display control circuit with M4A5-128P64-10VC.

1 LED display composition

In the LED display system, the lattice structure unit is its basic structure. Each display drive unit is composed of several 8×8 dot matrix LED display modules. It is assembled by a plurality of display driver boards to form a display screen of several square meters, which can be used to display various characters and images. LED display screen includes computer video acquisition circuit, control circuit, drive circuit and power supply, as shown in Figure 1.

The LED display has two primary colors, red and green. Each primary color has 256 levels of gray, and the pixel pitch is 7.62 mm. The pixel can reach 1024 points in the horizontal direction and 768 points in the vertical direction.

2 LED electronic display features

The LED display screen is composed of a plurality of display units, and the display mode adopts the principle that the LED dot matrix is ​​mapped with the computer display screen, that is, one pixel of the LED dot matrix corresponds to a pixel point of the computer display screen, such as a computer. The screen on the screen is divided into 640 columns and 480 lines according to the resolution, that is, 640×480 dot matrix units on the LED display. Each dot matrix unit includes three kinds of light emitting diodes, red, green and blue. After the three colors of light are mixed, the color perceived by the human eye is obtained. According to the principle of optical three primary colors, we only collect images of each point on the computer screen and digitize them into three signals of red, green and blue, and process them through the system. After that, it is transmitted to the dot matrix unit on the LED dot matrix screen to respectively drive the corresponding color LEDs, that is, the mapping of the computer screen on the LED dot matrix screen is realized.

3 LED electronic display drive principle

In most LED display systems, the refresh driving method is adopted, that is, the driving unit column latch data is displayed for each LED, and the scanning is performed in the row direction. According to the LED display driving board structure, the 1P16 scanning duty ratio is adopted.

Our LED display driver board driver circuit uses two 74HC595 to form a 4:16 line row decoder, which provides the line signal required for the entire scanning circuit, and also uses the 74HC595 chip as the serial shift register, which will be the system. The transmitted serial data shift becomes a parallel signal output, so the drive column needs to provide a serial shift clock, a parallel lock signal, and an output enable signal. The line scan requires a serial data input and a serial shift clock signal. as shown in picture 2. So we need to design a timing control circuit.

4 Conclusion

M4A5—128P64—10VC is a CPLD device produced by Lattice with 128 macro cells and 64 IPO pins. Lattice's development software ispDesignEXPERT integrates all aspects of design entry, compilation, validation, and programming. First, the design input can be used to draw the schematic directly, or it can be programmed in VHDL language. We need to get a 100KHz signal from a 10MHz clock source. Write a file named F100K.HDL in the VHDLMODULE text editor using the VHDL language as follows:

After the design file is input, it can be compiled, and then the user can adjust the pin assignment and compile it to program the chip. Use the Byte-Blaster download cable to connect the parallel port of the computer to the JTAG socket on the PCB. After power-on, program the installed chip.

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