NXP launches "the world's first fully scalable computing architecture S32"

The launch of the S32 at this time reflects NXP's focus on the ADAS and autonomous vehicle markets and is a "demonstration" against other competitors.

On Tuesday, Dutch semiconductor supplier NXP launched "the world's first fully scalable computing architecture S32", mainly for OEMs and TIer 1 suppliers, implementing nodes, software and general functions between different domains, applications and SoCs Reuse. However, by the second half of 2018, we will not see any chip products built on this platform for the time being.

However, as a leading global automotive chip supplier, NXP has an in-depth understanding of the current challenges facing automotive R&D: the ever-expanding number of software, the complexity of applications is too complex and difficult to integrate, and so on. It reflects NXP's attention and thinking about the ADAS and autonomous driving markets, as well as "demonstrations" against other competitors.

NXP launches "the world's first fully scalable computing architecture S32"

NXP S32 automotive processor platform

Mentioned in the industry, "the car is full of car MCUs that are used as ECUs," said Matt Johnson, general manager and group vice president of NXP Automotive Microcontrols and Processors. MCU compatibility is not good and cannot be extended and reused."

Therefore, the purpose of launching the new S32 automotive processor platform is to solve the above problems. It allows the car manufacturer to complete new car development in a faster and shorter time, ensuring that consumers can quickly launch new models. According to Matt, "At present, 8 of the top 15 car companies have begun to use the S32 platform to develop new products, and more OEMs will join in the future."

Other automotive semiconductor suppliers, such as Texas Instruments and Renesas, may adopt similar platform product strategies in the future, but have not seen any substantial actions. Perhaps they are already planning at the moment, but from the perspective of the scalability of hardware and software, it may not provide such a wide range of solutions.

Security, security and OTA wireless upgrades

If you want to say that the NXP S32 computing architecture makes the biggest promise to customers, it is to provide "common functions" between all SoCs on the platform, different domains and applications of the car. Popularly speaking, NXP plans to enable any MCU or SoC running in the car to implement security, security and OTA wireless upgrades.

According to Matt, NXP has achieved the highest level of ASIL-D certification with decades of experience in secure core development. Therefore, ARM Cortex-A, Cortex-R and Cortex-M used by S32 belong to ASIL. -D kernel.

It should be pointed out here that when the functional safety design of the system is implemented in the road vehicle functional safety standard ISO 26262, an important step in the early stage is to conduct a hazard analysis and risk assessment of the system, identify the hazard of the system and the risk level of the hazard – The ASIL rating (AutomoTIve Safety IntegraTIon Level) is evaluated. ASIL has four levels, A, B, C, and D, where A is the lowest level and D is the highest level.

NXP launches "the world's first fully scalable computing architecture S32"

Matt pointed out that NXP has been trying to continuously improve the functional safety standards of the chip by adding faulty work to each ECU. When a car fails, not only the driver or (unmanned system) will be notified, but also the faulty work module will be involved and self-healing. As for how to "self-repair", or to stop or continue driving or returning to the original route, it is decided by the OEM that they have different programming methods. Since the implementation of the fault operation function has been undertaken by the chip supplier, the car factory will not have such a large software programming pressure, which will help accelerate the early sunset of the new product.

Security is another important common feature of the S32 platform chip. Many years ago, the industry was still discussing whether it was necessary to implement hardware security for every MCU or MPU used in the car, but such a debate is currently meaningless. Thanks to NXP's years of experience in bank card security, the MCU of the S32 platform can gain the capability of a side channel attack.

As for the OTA wireless upgrade, it may be that many years ago when this technology was first introduced, the entire industry did not agree. At present, in addition to the built-in OTA upgrade capability of Tesla's production models, other auto companies are also considering adding this function to the intelligent networked cars produced in the future, and this function is considered from the perspective of safety and security. It is very necessary.

Just a "targeting" statement?

However, before NXP launches a production chip based on the S32 platform, it may be difficult to determine what features it can provide to customers. Mike Demler, senior analyst at Linley Group, questioned whether the S32 platform chip really has universal functionality.

Admittedly, NXP has solidified the ARM architecture for MCUs, but Demler points out that even with the cores provided by the same CPU vendor (such as Cortex-A/M/R), you can use different architectures to run different software. While different automotive processor platforms are evolving toward autonomous driving (which requires deep learning, etc.), it may require a customized architecture to run customized software. For example, the Cognivue Vision Accelerator on NXP's S32V processor.

And considering the "debugging" of deep learning, Demler believes that "this is completely different from debugging other software, and this is not the same as debugging any special architecture processor. Maybe using the same set of development tools will bring A lot of convenience, but emerging technology applications like autonomous driving are better able to have a set of specialized tools for their development."

In short, Demler believes that NXP's launch of the S32 computing architecture can be seen as a "positioning" statement made externally.

NXP launches "the world's first fully scalable computing architecture S32"

S32 claims to be able to maximize the reuse of hardware and software

Lack of future application verification?

Another concern is the extent to which the scalability and scalability of the S32 platform can be achieved, such as when a new processing architecture for autonomous driving will emerge in the future.

It is unclear what technical support NXP plans to provide for autonomous driving, and whether there are SoC products that can compete with NVIDIA Pegasus or Xavier. Since the Qualcomm acquisition of NXP is still subject to the EU antitrust investigation, the two companies have not publicly discussed the future joint technology roadmap for the automotive market.

Let us not talk about the problem of driverless cars for the time being. Matt stressed that NVIDIA's latest release of the Pegasus computing platform is actually an "endpoint solution" for L5-class autopilot applications. Despite its powerful computing performance, you still need 100 ECUs in your car. I hope some ECUs will use NXP products.

When asked "How will the S32 platform change as the future demand for computing platform processing performance increases?", Matt said that NXP will not only resort to this platform. He pointed out that with the increase in the adoption rate of S32 platforms by car companies and suppliers, NXP plans to provide "customized solutions" for "special needs."

Demler concluded that NXP has an extensive array of automotive processor products based on ARM architecture, and customers will obviously use these processors in different systems. Therefore, for NXP, it is necessary to ensure that customers can reuse most of the software in different product lines, but this does not mean that these products can meet the processing performance requirements of future cars.

Car cloud summary:

When NXP released the S32 platform, it said, "The unique technology independent architecture has been used to redesign the IP of the entire microcontroller series, creating a common function across the technology nodes, ensuring the consistency of hardware and software behavior."

Integrating MCUs, MPUs, different portable software features and hardware features (such as embedded memory) into a single platform is a very complicated matter, and developing a common platform can make this complicated thing relatively It's easier. NXP's investment in this common platform strategy is timely, not only to provide customers with more flexible products, but also to reduce R&D costs to acceptable levels.   

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